SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE

摘要

Disclosed is a semiconductor device in which, when two adjacent semiconductor chips are coupled with bonding wires, a short circuit between the adjacent bonding wires can be suppressed. A first bonding wire, a second bonding wire, a third bonding wire, and a fourth bonding wire are lined up in this order along a first side. When viewed from a direction perpendicular to a chip mounting part, a maximum of the space between the first bonding wire and the second bonding wire is larger than that of the space between the second bonding wire and the third bonding wire. Further, a maximum of the space between the second bonding wire and the third bonding wire is larger than that of the space between the third bonding wire and the fourth bonding wire.

主权项

1. A semiconductor device comprising:
a first semiconductor chip that is a rectangle having a first side, a second side facing the first side, a third side, and a fourth side; a second semiconductor chip that is a rectangle having a fifth side, a sixth side facing the fifth side, a seventh side, and an eighth side; a chip mounting part, over the same surface of which the first semiconductor chip and the second semiconductor chip are mounted; and a plurality of bonding wires that couple the first semiconductor chip to the second semiconductor chip, wherein the first side of the first semiconductor chip faces the fifth side of the second semiconductor chip, wherein the first semiconductor chip has a plurality of first electrode pads arranged along the first side, wherein the second semiconductor chip has a plurality of second electrode pads arranged along the fifth side, wherein, of the bonding wires, a first bonding wire, a second bonding wire, a third bonding wire, and a fourth bonding wire are lined up in this order along the first side, wherein, when viewed from a direction perpendicular to the chip mounting part, a maximum of a space between the first bonding wire and the second bonding wire is larger than that of a space between the second bonding wire and the third bonding wire, and wherein, when viewed from the direction perpendicular to the chip mounting part, the maximum of the space between the second bonding wire and the third bonding wire is larger than that of a space between the third bonding wire and the fourth bonding wire.