| 发明名称 |
INTERPOSER AND SEMICONDUCTOR PACKAGE USING THE SAME, AND METHOD OF MANUFACTURING INTERPOSER |
| 摘要 |
Disclosed herein is an interposer, including: an interposer substrate configured by stacking an insulating layer of one layer or more and interlayer connected through a via; a cavity penetrating through a center of the interposer substrate in a thickness direction; and a connection electrode having a post part which is disposed on at least one of an upper surface and a lower surface of the interposer substrate, thereby increasing electrical characteristics and reducing manufacturing cost and time. |
| 申请公布号 |
US2015061093(A1) |
申请公布日期 |
2015.03.05 |
| 申请号 |
US201414472365 |
申请日期 |
2014.08.28 |
| 申请人 |
SAMSUNG ELECTRO-MECHANICS CO., LTD. |
发明人 |
KIM Ki Hwan;PARK Jung Hyun;CHO Yong Yoon;JEONG Sung Won;KIM Da Hee;HAN Gi Ho |
| 分类号 |
H01L23/498;H01L23/31;H01L21/768 |
主分类号 |
H01L23/498 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An interposer, comprising:
an interposer substrate configured by stacking an insulating layer of one layer or more and interlayer connected through a via; a cavity penetrating through a center of the interposer substrate in a thickness direction; and a connection electrode having a post part which is disposed on at least one of an upper surface and a lower surface of the interposer substrate. |
| 地址 |
Suwon-si KR |
