| 摘要 |
A continuous-time ΔΣ-ADC (1) is disclosed. It comprises a sampled quantizer (5) arranged to generate samples y(n) of a digital output signal of the ΔΣ-ADC (1) at sample instants nT, where n is an integer sequence index and T is a sampling period, based on an analog input signal to the quantizer (5). Furthermore, the ΔΣ-ADC (1) comprises one or more DACs (10a-b), each arranged to generate an analog feedback signal based on the samples of the digital output signal generated by the sampled quantizer (5). Moreover, the ΔΣ-ADC (1) comprises a continuous-time analog network (20) arranged to generate the analog input signal to the quantizer (5) based on the feedback signal(s) from the one or more DACs (10a-b) and an analog input signal to the ΔΣ-ADC (1). At least one DAC (10b) of the one or more DACs (10b) comprises two switched-capacitor DACs (40, 50) arranged to operate on the same input but with a mutual delay in time. A corresponding radio receiver circuit (100), a corresponding intergrated circuit (200), and a corresponding radio communication apparatus (300, 400) are also disclosed. |
