| 发明名称 |
MEMORY DEVICE |
| 摘要 |
A memory device according to embodiments includes a cell array region. The cell array region comprises a plurality of transistors sharing a word line, a plurality of memory elements, and a plurality of first contacts configured to connect the plurality of transistors with the plurality of memory elements, respectively, and aligned in a pith. The memory device further comprises a second contact positioned in the pith, along an extension of a row of the plurality of first contacts, outside the cell array region, and configured to be in contact with the word line. |
| 申请公布号 |
US2015061025(A1) |
申请公布日期 |
2015.03.05 |
| 申请号 |
US201414174598 |
申请日期 |
2014.02.06 |
| 申请人 |
NAKAZAWA Takashi |
发明人 |
NAKAZAWA Takashi |
| 分类号 |
H01L23/535;H01L21/768;H01L27/105 |
主分类号 |
H01L23/535 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A memory device comprising:
a cell array region comprising
a plurality of transistors sharing a word line,a plurality of memory elements, anda plurality of first contacts configured to connect the plurality of transistors with the plurality of memory elements, respectively, and aligned in a pith; and a second contact positioned in the pith, along an extension of a row of the plurality of first contacts, outside the cell array region, and configured to be in contact with the word line. |
| 地址 |
Gyeonggi-do KR |
