发明名称 MEMORY CELL COMPRISING FIRST AND SECOND TRANSISTORS AND METHODS OF OPERATING
摘要 <p>Semiconductor memory cells, array and methods of operating are disclosed. In one instance, a memory cell includes a bi-stable floating body transistor and an access device; wherein the bi-stable floating body transistor and the access device are electrically connected in series.</p>
申请公布号 KR20150022744(A) 申请公布日期 2015.03.04
申请号 KR20147025821 申请日期 2013.02.15
申请人 ZENO SEMICONDUCTOR, INC. 发明人 WIDJAJA YUNIARTO;HAN JIN WOO;LOUIE BENJAMIN S.
分类号 H01L21/8239;G11C11/40 主分类号 H01L21/8239
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