发明名称 METHOD FOR PRODUCING A DPA-RESISTANT LOGIC CIRCUIT
摘要 <p>In an application-specific integrated circuit (ASIC), a description of the logic circuit is formulated in a hardware description language and then converted into a description of a corresponding physical circuit, i.e., into a netlist, using a conversion program, i.e., a synthesis tool. The description at least largely consisting of standard cells. During the conversion process, the standard cells which are used in the netlist are replaced with standard cell versions which have a correspondingly balanced power dissipation. Spying on a mode of operation of the circuit by analyzing a power consumption of the circuit is thus advantageously hindered or prevented, in particular in security-relevant circuits.</p>
申请公布号 EP2842066(A1) 申请公布日期 2015.03.04
申请号 EP20130717247 申请日期 2013.04.12
申请人 SIEMENS AG ÖSTERREICH 发明人 EPPENSTEINER, FRIEDRICH;GHAMESHLU, MAJID;TAUCHER, HERBERT
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项
地址