发明名称 Tuning and control of an acoustic wave filter via a capacitor bank
摘要 In an acoustic wave filter a differential between the target/designed load on the input node or the target/designed load on the output node of a filter module (450) may affect its performance. The tunable filter is configured to reduce effects of impedance mismatches between the input and output loads (VSWR other than expected by filter module nominally). A variable capacitor (98A, 98B, 98C) is employed to modulate acoustic wave resonators (80A, 80B, 80C) to reduce a input signal insertion loss due to an unexpected or non-conforming VSWR (not equal to VSWR the filter model was designed to process). A PROM (448) is configured to include variable capacitor deltas for various VSWR. The control logic module may sense the output load, determine the VSWR differential, and choose the closest set of variable capacitor deltas from the PROM.
申请公布号 EP2843834(A1) 申请公布日期 2015.03.04
申请号 EP20140003070 申请日期 2011.12.09
申请人 PEREGRINE SEMICONDUCTOR CORPORATION 发明人 BURGENER, MARK L.;CABLE, JAMES S.
分类号 H03H9/02;H03H7/40;H03H7/48;H03H9/54;H03H9/64;H03H9/70;H03H9/72 主分类号 H03H9/02
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