发明名称 Semiconductor device and method for manufacturing same
摘要 According to an embodiment, a semiconductor device, includes a semiconductor substrate, first and second transistors. The first transistor includes a first insulating film provided on the semiconductor substrate, a first conductive film provided on the first insulating film, a second insulating film provided on the first conductive film, and a second conductive film provided on the second insulating film. The second transistor is provided to be separated from the first transistor, the second transistor including a third insulating film provided on the semiconductor substrate, a third conductive film provided on the third insulating film, a fourth insulating film provided on the third conductive film, and a fourth conductive film provided on the fourth insulating film. The third conductive film is thicker than the first conductive film, and the second transistor has a through-portion piercing the fourth insulating film to connect the third conductive film and the fourth conductive film.
申请公布号 US8969941(B2) 申请公布日期 2015.03.03
申请号 US201313772702 申请日期 2013.02.21
申请人 Kabushiki Kaisha Toshiba 发明人 Sakamoto Wataru
分类号 H01L29/788;H01L29/66;H01L21/28;H01L27/115 主分类号 H01L29/788
代理机构 Oblon, McClelland, Maier & Neustadt, L.L.P. 代理人 Oblon, McClelland, Maier & Neustadt, L.L.P.
主权项 1. A semiconductor device, comprising: at least one NAND string provided on an element region extending in a first direction in a surface of a semiconductor substrate, the NAND string comprising: a memory cell transistor having a stacked gate structure including a first insulating film provided part of the element region, a first conductive film provided on the first insulating film, a second insulating film provided on the first conductive film, and a second conductive film provided on the second insulating film; and a select transistor provided to be separated from the memory cell transistor on the element region, the select transistor having a stacked gate structure including a third insulating film provided on the other part of the element region, a third conductive film provided on the third insulating film, a fourth insulating film provided on the third conductive film, and a fourth conductive film provided on the fourth insulating film, the select transistor having a through-portion in the fourth insulating film to electrically connect the third conductive film and the fourth conductive film, wherein the memory cell transistor and the select transistor are arranged in the first direction, and the third conductive film is thicker than the first conductive film, and wherein a lower surface of the third conducting film is provided in the same plane as a lower surface of the first conducting film.
地址 Tokyo JP