发明名称 Output current distortion compensating apparatus in inverter
摘要 An output current distortion compensating apparatus in an inverter is disclosed, the inverter including an inverter controller generating a PWM signal for controlling a PWM voltage generator, wherein the inverter controller includes a first dead time compensation voltage generator generating a compensation voltage based on an output current polarity of each phase in the inverter, and a second dead time compensation voltage generator generating a compensation voltage based on an output current waveform of each phase in the inverter, and wherein a first dead time compensation voltage outputted from the first dead time compensation voltage generator and a second dead time compensation voltage outputted from the second dead time compensation voltage generator are added to generate a final dead time compensation voltage, thereby preventing occurrence of hunting phenomenon in which a current is greatly fluctuated.
申请公布号 US8971067(B2) 申请公布日期 2015.03.03
申请号 US201113078869 申请日期 2011.04.01
申请人 LSIS Co., Ltd. 发明人 Kim Kwang Yeon
分类号 H02M7/5395;H02M1/12;H02M7/5387 主分类号 H02M7/5395
代理机构 Lee, Hong, Degerman, Kang & Waimey 代理人 Lee, Hong, Degerman, Kang & Waimey
主权项 1. An apparatus for controlling an inverter, the apparatus comprising: a phase voltage command unit configured to generate a voltage command for the inverter using a frequency command and a prescribed voltage to frequency ratio; a detector configured to detect a output current of the inverter; a first compensation voltage generator configured to generate a first compensation voltage based on a polarity of the output current of the inverter, the first compensation voltage including a voltage compensating the voltage command during a dead-time; an additional compensation voltage generator configured to generate a second compensation voltage based on a waveform of the output current of the inverter, the second compensation voltage including a voltage compensating the voltage command during the dead-time; and a pulse-width modulation (PWM) signal generator configured to generate a PWM signal based on a final voltage command obtained by adding the first and second compensation voltages, wherein the PWM signal is inputted to the inverter; wherein the additional compensation voltage generator includes: an accumulator configured to accumulate the output current of the inverter for a period; anda second compensation voltage generator configured to generate the second compensation voltage based on an accumulation of the output current of the inverter for the period and to generate a negative voltage as the second compensation voltage when the accumulation of the output current of the inverter for the period is positive.
地址 Anyang-Si, Gyeonggi-Do KR