Apparatus and method for integration of through substrate vias

摘要

An apparatus and method are provided for integrating TSVs into devices prior to device contacts processing. The apparatus includes a semiconducting layer; one or more CMOS devices mounted on a top surface of the semiconducting layer; one or more TSVs integrated into the semiconducting layer of the device wafer; at least one metal layer applied over the TSVs; and one or more bond pads mounted onto a top layer of the at least one metal layer, wherein the at least one metal layer is arranged to enable placement of the one or more bond pads at a specified location for bonding to a second device wafer. The method includes obtaining a wafer of semiconducting material, performing front end of line processing on the wafer; providing one or more TSVs in the wafer; performing middle of line processing on the wafer; and performing back end of line processing on the wafer.

主权项

1. A method of integrating through substrate vias, comprising:
obtaining a wafer of semiconducting material, wherein the wafer has a front, a back, and at least one side, and the back is comprised of a substrate material; performing front end of line processing on the wafer; providing one or more through substrate vias in the wafer, comprising:
etching from a wafer surface into the wafer to create one or more wafer holesdepositing a dielectric liner onto the wafer surface and into the one or more wafer holes;depositing a metal barrier and seed layer onto the wafer surface and into the one or more wafer holes;plating the one or more wafer holes with a conductor; andpolishing the wafer to remove any of the conductor and metal barrier and seed layer from the surface of the wafer; performing middle of the line processing on the wafer after forming the one or more through substrate vias in the wafer; performing back end of line processing on the wafer; providing a carrier wafer having a front, a back, and at least one side; bonding the front of the wafer to the carrier wafer using an adhesive; removing, from the back of the wafer, the substrate material; wet etching, from the back of the wafer, to expose at least one feature made from a metallization scheme; processing the back of the wafer to create at least one backside redistribution layer; removing the wafer from the carrier wafer; dicing the wafer into individual die; providing a base technology wafer having a front, a back, and at least one side; coating the front of the base technology wafer with a sacrificial adhesive; placing the front of the individual die onto the front of the base technology wafer; and bonding the individual die to the base technology wafer.