Method of forming a self-aligned charge balanced power DMOS

摘要

Self-aligned charge balanced semiconductor devices and methods for forming such devices are disclosed. One or more planar gates are formed over a semiconductor substrate of a first conductivity type. One or more deep trenches are etched in the semiconductor self-aligned to the planar gates. The trenches are filled with a semiconductor material of a second conductivity type such that the deep trenches are charge balanced with the adjacent regions of the semiconductor substrate Source and body regions are formed by implanting dopants onto the filled trenches. This process can form self-aligned charge balanced devices with a cell pitch less than 12 microns.

主权项

1. A method for forming a self-aligned charge balanced semiconductor device comprising:
a) forming one or more planar gates over a semiconductor substrate of a first conductivity type; b) etching one or more deep trenches in the semiconductor substrate self-aligned to the planar gates; c) filling said deep trenches with a semiconductor material of a second conductivity type such that the deep trenches are charge balanced with the adjacent regions of the semiconductor substrate; and d) forming source and body regions by implanting dopants onto the filled trenches.