Apparatus, method and system for using real-time performance feedback for modeling and improving access to solid state media

摘要

A storage processor identifies latency of memory drives for different numbers of concurrent storage operations. The identified latency is used to identify debt limits for the number of concurrent storage operations issued to the memory drives. The storage processor may issue additional storage operations to the memory devices when the number of storage operations is within the debt limit. Storage operations may be deferred when the number of storage operations is outside the debt limit.

主权项

1. An apparatus, comprising:
a memory; a processor configured to issue the storage commands to the memory based on a number of concurrent storage commands being serviced by the memory and based on an expected latency associated with the number of concurrent storage commands; identify a performance curve for the memory, wherein the performance curve maps the number of concurrent storage commands with the expected latency; issue the storage commands to the memory based on the performance curve; identify a first section of the performance curve associated with overhead processing; identify a second section of the performance curve associated with stalling in the memory; issue the storage commands to the memory based on the number of concurrent storage commands associated with the first and second section of the performance curve; identify a first slope for the first section of the performance curve; identify a second slope for the second section of the performance curve; issue the storage commands to the memory based on the first slope and the second slope; identify changes in the performance curve; dynamically change the number of concurrent storage commands issued to in the memory based on the changes in the performance curve; identify a write limit based on the performance curve, wherein the write limit is associated with writing data into the memory; measure a latency for one of the storage commands; compare the measured latency to the write limit; discontinue writing data to the memory in response to the latency being outside of the write limit; identify a use limit based on the performance curve, wherein the use limit is associated with reading data from the memory; compare the latency to the use limit; and erase data in the memory in response to the latency being outside of the use limit.