发明名称 |
4N+1 level capacitive DAC using N capacitors |
摘要 |
A digital-to analog converter (DAC) of the charge transfer type for use in a sigma delta modulator, includes a capacitor switch unit operable to generate a 4n+1 output levels, comprising: a plurality of second switching units for coupling first terminals of a plurality of reference capacitor pairs with either a positive or a negative reference signal; wherein the second terminals of the plurality of reference capacitor pairs are coupled in parallel, respectively; wherein for even transfers a single switching combination is provided to achieve linearity and wherein for odd transfers an average of different switching combinations is provided to achieve linearity; wherein an even transfer is when an input of the DAC is even and an odd transfer is when an input to the DAC is odd. |
申请公布号 |
US8970416(B2) |
申请公布日期 |
2015.03.03 |
申请号 |
US201414202823 |
申请日期 |
2014.03.10 |
申请人 |
Microchip Technology Incorporated |
发明人 |
Quiquempoix Vincent |
分类号 |
H03M3/00;H03M1/80;H03M1/06 |
主分类号 |
H03M3/00 |
代理机构 |
King & Spalding L.L.P. |
代理人 |
King & Spalding L.L.P. |
主权项 |
1. A digital-to analog converter (DAC) of the charge transfer type for use in a sigma delta modulator, comprising:
a capacitor switch unit operable to generate a 4n+1 output levels, comprising: a plurality of second switching units for coupling first terminals of a plurality of reference capacitor pairs with either a positive or a negative reference signal; wherein the second terminals of the plurality of reference capacitor pairs are coupled in parallel, respectively; wherein for even transfers a single switching combination is provided to achieve linearity and wherein for odd transfers an average of different switching combinations is provided to achieve linearity; wherein an even transfer is when an input of the DAC is even and an odd transfer is when an input to the DAC is odd. |
地址 |
Chandler AZ US |