| 发明名称 |
Bonded stacked wafers and methods of electroplating bonded stacked wafers |
| 摘要 |
A wafer structure includes a first wafer stack and a first bonding layer disposed on the first wafer stack. The wafer structure further includes a second wafer stack that includes a first surface and a second surface opposing the first surface. A second bonding layer is disposed on the second surface and is in contact with the first bonding layer. The second wafer stack comprises through-silicon-vias (TSVs) that extend from the first surface to the second bonding layer. A seed layer is disposed on the first surface and is in contact with the TSVs. |
| 申请公布号 |
US8970043(B2) |
申请公布日期 |
2015.03.03 |
| 申请号 |
US201113018534 |
申请日期 |
2011.02.01 |
| 申请人 |
Maxim Integrated Products, Inc. |
发明人 |
Zou Quanbo;Sridhar Uppili;Kelkar Amit S.;Ying Xuejun |
| 分类号 |
H01L23/02;H01L23/48;H01L23/52;H01L29/40;C25D17/00;B81C3/00;C25D7/12;H01L25/00;H01L23/00 |
主分类号 |
H01L23/02 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A wafer structure comprising:
a first wafer stack; a first bonding layer disposed on the first wafer stack; a second wafer stack comprising:
a first surface; anda second surface opposing the first surface; a second bonding layer disposed on the second surface and in contact with the first bonding layer, wherein the second wafer stack comprises through-silicon-vias (TSVs) that extend from the first surface to the second bonding layer; and a seed layer that is disposed on the first surface and is in contact with the TSVs, wherein the seed layer extends across the first surface to edges of the first wafer stack and contacts the first bonding layer between the edges of the first wafer stack and edges of the second wafer stack. |
| 地址 |
San Jose CA US |
