发明名称 |
Internal voltage generating circuit for preventing voltage drop of internal voltage |
摘要 |
An internal voltage generating circuit is utilized to perform a TDBI (Test During Burn-in) operation for a semiconductor device. The internal voltage generating circuit produces an internal voltage at a high voltage level, as an internal voltage, in not only a standby section but also in an active section in response to a test operation signal activated in a test operation. Accordingly, dropping of the internal voltage in the standby section of the test operation and failure due to open or short circuiting are prevented. As a result, reliability of the semiconductor chip, by preventing the generation of latch-up caused by breakdown of internal circuits, is assured. |
申请公布号 |
US8970236(B2) |
申请公布日期 |
2015.03.03 |
申请号 |
US201113154680 |
申请日期 |
2011.06.07 |
申请人 |
Hynix Semiconductor Inc. |
发明人 |
Lee kang-Seol;Yoon Seok-Cheol |
分类号 |
G01R31/00;G01R31/02;G05F1/46;G11C5/14;G11C29/06;G11C29/12 |
主分类号 |
G01R31/00 |
代理机构 |
IP & T Group LLP |
代理人 |
IP & T Group LLP |
主权项 |
1. A semiconductor device, comprising:
a controller that generates an active signal in response to internal control signals and a test operation signal, during a test operation of the semiconductor device; and a voltage generator that generates a high voltage level in response to the active signal, during a time period that the semiconductor device is active through a time period that the semiconductor device is in a standby mode so that a voltage drop is prevented during the standby mode time period. |
地址 |
Gyeonggi-do KR |