发明名称 Semiconductor device and manufacturing method of semiconductor device
摘要 A semiconductor device with a nonvolatile memory is provided which has improved characteristics. The semiconductor device includes a control gate electrode, a memory gate electrode disposed adjacent to the control gate electrode, a first insulating film, and a second insulating film including therein a charge storing portion. Among these components, the memory gate electrode is formed of a silicon film including a first silicon region positioned over the second insulating film, and a second silicon region positioned above the first silicon region. The second silicon region contains p-type impurities, and the concentration of p-type impurities of the first silicon region is lower than that of the p-type impurities of the second silicon region.
申请公布号 US8969943(B2) 申请公布日期 2015.03.03
申请号 US201113302184 申请日期 2011.11.22
申请人 Renesas Electronics Corporation 发明人 Toba Koichi;Ishii Yasushi;Chakihara Hiraku;Funayama Kota;Kawashima Yoshiyuki;Hashimoto Takashi
分类号 H01L29/792;H01L21/28;H01L27/115 主分类号 H01L29/792
代理机构 Miles & Stockbridge P.C. 代理人 Miles & Stockbridge P.C.
主权项 1. A semiconductor device, comprising: a semiconductor substrate; a first gate electrode disposed over the semiconductor substrate; a second gate electrode disposed over the semiconductor substrate so as to be adjacent to the first gate electrode; a first insulating film formed between the first gate electrode and the semiconductor substrate; and a second insulating film formed between the second gate electrode and the semiconductor substrate, and between the first gate electrode and the second gate electrode, said second insulating film including therein a charge storing portion, wherein the second gate electrode includes: a first silicon region positioned over the second insulating film; and a second silicon region positioned over the first silicon region, wherein the second silicon region contains p-type impurities, wherein a concentration of p-type impurities of the first silicon region is lower than that of the p-type impurities of the second silicon region, wherein the second insulating film and the first silicon region of the second gate electrode intervene in between the semiconductor substrate and the second silicon region of the second gate electrode, and wherein the second insulating film and the first silicon region of the second gate electrode intervene in between the first gate electrode and the second silicon region of the second gate electrode.
地址 Kawasaki-shi JP
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