Clock signal synchronization

摘要

Circuits and methods are introduced to allow for timing relationship between a clock signal and a synchronization signal to be observed. The observations may include observing the timing relationship between a capture edge of the clock signal and a transition of the synchronization signal. Based on the observations the timing of the synchronization signal transition may be adjusted. Observing the timing relationship may include providing a delayed synchronization signal and a delayed clock signal. The delayed synchronization signal may provide what happens before the capture edge of the clock signal. The delayed clock signal may provide what happens after the capture edge of the clock signal.

主权项

1. A method for determining a timing relationship between transitions of a clock signal and a synchronization signal at a receiver, the method comprising:
delaying the clock signal by a first predetermined amount; delaying the synchronization signal by a second predetermined amount; comparing a time of a predetermined transition of the synchronization signal to a time of a predetermined transition of the clock signal; comparing a time of the predetermined transition of the delayed synchronization signal to a time of the predetermined transition of the clock signal; comparing a time of the predetermined transition of the synchronization signal to a time of the predetermined transition of delayed clock signal; and based on the three comparisons, adjusting a delay of either the synchronization signal or the clock signal at an input of the receiver.