Method and apparatus for synchronizing the time reference of a dynamically activated processor to the system time reference

摘要

Implementations of the present disclosure involve an apparatus and/or method for synchronizing at least one newly activated processor with at least one previously running processor. Each processor is configured to generate a heartbeat and operate according to a STICK. When a previously deactivated processor is added, the heartbeat of each active processor is reset and the current STICK is transmitted to the newly activated processor on the next heartbeat. The newly activated processor may then add the heartbeat period to the acquired STICK and begin incrementing the STICK and normal operation after the next heartbeat.

主权项

1. A computer system comprising:
a newly activated processor and an existing active processor, wherein each of the newly activated processor and the existing active processor comprises:
a heartbeat signal generator circuit comprising:
a global timer configured to generate a system heartbeat signal by incrementing to a preconfigured value and restart to a start value once the preconfigured value is reached, repeating continuously while the processor is in operation; anda heartbeat reset signal configured to reset the global timer to the start value; anda local timer configured to output a system-wide incrementing value; wherein upon activation of the newly activated processor, a heartbeat reset signal is transmitted to at least the existing active processor and the newly activated processor; and wherein the newly activated processor is configured to receive a current system-wide incrementing value, increment the system-wide incrementing value according to a period of system heartbeat signal, and load the system-wide incrementing value into the local timer of the newly activated processor.