Method, apparatus and system for exchanging communications via a command/address bus

摘要

Techniques and mechanisms for exchanging information from a memory controller to a memory device via a command/address bus. In an embodiment, the memory device samples a first portion of a command during a first sample period and samples a second portion of the command during a second sample period, the first portion and second portion exchanged via the command/address bus. The first sample period and the second sample period are concurrent with, respectively, a first transition of a clock signal and a second transition of the clock signal. In another embodiment, a mode of the memory device determines a relationship between the first transition and the second transition.

主权项

1. A memory device comprising:
a mode register to store a value identifying a mode of operation of the memory device; and command/address (CA) logic to determine the mode based on the value and, based on the mode, to sample a command provided by a memory controller coupled to the memory device, including:
the CA logic to sample a first portion of the command provided via a command/address bus during a first period, wherein a middle of the first period is synchronized with a first transition of a first clock signal provided by the memory controller; andthe CA logic to sample a second portion of the command provided via the command/address bus during a second period, wherein a middle of the second period is synchronized with a second transition of the first clock signal; wherein if the determined mode is a first mode, then the second transition is an Nth transition of the first clock signal after the first transition, wherein N is an integer greater than one, and if the determined mode is a second mode, the second transition is a next transition of the first clock signal after the first transition.