发明名称 Method and system for forward error correction decoding with parity check for use in low complexity highly-spectrally efficient communications
摘要 A receiver receives an inter-symbol correlated (ISC) signal with information symbols and a corresponding parity symbol. Values of information symbols are estimated utilizing parity samples that are generated from the parity symbols. One or more maximum likelihood (ML) decoding metrics are generated for the information symbols. One or more estimations are generated for the information symbols based on the one or more ML decoding metrics. A parity metric is generated for each of the one or more generated estimations of the information symbols. The parity metric is generated by summing a plurality of values of one of the generated estimations to generate a sum, and wrapping the sum to obtain a parity check value that is within the boundaries of a symbol constellation utilized in generating the information symbols.
申请公布号 US8972836(B2) 申请公布日期 2015.03.03
申请号 US201314057098 申请日期 2013.10.18
申请人 MagnaCom Ltd. 发明人 Eliaz Amir
分类号 H03M13/00;G06F11/00;H04L27/36;H04B1/10;H04L23/02;H04L27/04;H04L27/00;H04L27/02;H04L25/03;H04L27/01;H04L7/00;G06F11/10;H04B1/16;H04L1/20;H04B1/709;H04B1/04 主分类号 H03M13/00
代理机构 McAndrews, Held & Malloy, Ltd. 代理人 McAndrews, Held & Malloy, Ltd.
主权项 1. A system comprising: circuitry for use in an electronic receiver, wherein said circuitry comprises: a receiver front-end operable to receive a plurality of symbols of a signal transmitted over a communication channel, wherein: said plurality of symbols comprise a plurality of information symbols and a parity symbol; andeach of said information symbols represents a plurality of bits; anda sequence estimation circuit operable to: generate one or more symbol-domain parity metrics; anddetermine values of said plurality of information symbols based on said one or more symbol-domain parity metrics and said received parity symbol.
地址 IL