INTEGRATED SPLIT GATE NON-VOLATILE MEMORY CELL AND LOGIC STRUCTURE

摘要

PROBLEM TO BE SOLVED: To provide a method making integrated circuits having both NVM and logic structures by using the same processing technology.SOLUTION: A method of making a semiconductor structure includes forming a select gate and a charge storage layer in an NVM region 112. A spacer select gate is formed by depositing a conformal layer followed by an etch back. A patterned etch results in leaving a portion of the charge storage layer over the select gate. A dummy gate structure formed in a logic region 114 has a dummy gate surrounded by an insulating layer 3102. Performing chemical mechanical polishing results in the top surface of the charge storage layer being coplanar with the top surface of the dummy gate structure, thereby including a further chemical mechanical polishing. Replacing a portion of the dummy gate structure with a metal logic gate 3304 results in the top surface of the charge storage layer being coplanar with the metal logic gate.