| 摘要 |
一种半导体记忆体设备包括一驱动电流控制方块，其配置以感测一虚拟记忆体元件的一电阻值，及产生一写入驱动器控制信号；及一写入驱动方块，其配置以回应于一写入驱动器致能信号和写入驱动器控制信号而将一驱动电压提供至一记忆体细胞阵列。; and a write driving block configured to provide a driving voltage to a memory cell array in response to a write driver enable signal and the write driver control signal. |
