| 摘要 |
本发明提供一种半导体积体电路包括测试输入/输出埠包括：测试焊垫；内部输入介面构成透过该测试输入/输出埠，响应外部信号以产生内部时脉、内部位址、内部命令、内部资料、与暂时储存资料；及误差检测组块构成判定该内部资料及该暂时储存资料是否相同，并透过该埠之一个测试焊垫输出结果。该内部输入介面包括资料输入/输出组块产生该内部资料，且该资料输入/输出组块包括暂时储存部分将该内部资料储存为该暂时储存资料；资料输出部分接收该暂时储存资料；及资料输入部分接收该资料输出部分之输出，并将其输出为该内部资料。; an internal input interface configured to generate an internal clock, an internal address, an internal command, internal data and temporary storage data in response to external signals through the test input/output port; and an error detection block configured to determine whether the internal data and the temporary storage data are the same, and output a result through one test pad of the port. The internal input interface includes a data input/output block which generates the internal data and the data input/output block includes a temporary storage part which stores the internal data as the temporary storage data, a data output part which receives the temporary storage data, and a data input part which receives an output of the data output part and outputs it as the internal data. |
