发明名称 |
RECONFIGURABLE DELAY CIRCUIT, DELAY MONITOR CIRCUIT USING SAID DELAY CIRCUIT, VARIATION CORRECTION CIRCUIT, VARIATION MEASUREMENT METHOD, AND VARIATION CORRECTION METHOD |
摘要 |
A delay circuit (10) containing a first inverting circuit, which contains a pull-up circuit (2) and a pull-down circuit (3), and a second inverting circuit, which contains a pull-up circuit (4) and a pull-down circuit (5). The delay circuit also contains: a first pass transistor (6) connected in series to the pull-up circuit of the first inverting circuit between a power supply potential and an output node; a second pass transistor (7) connected in series to the pull-down circuit (2) of the first inverting circuit between a ground potential and the output node (Out); a third pass transistor (8) inserted in series between an input node (In) and the pull-up circuit of the second inverting circuit; and a fourth pass transistor (9) inserted in series between the input node and the pull-down circuit of the second inverting circuit. The delay characteristic of the delay circuit is changed by a combination of control signals (C1-C4) applied to the gates of the first - fourth pass transistors. |
申请公布号 |
WO2015025682(A1) |
申请公布日期 |
2015.02.26 |
申请号 |
WO2014JP69976 |
申请日期 |
2014.07.29 |
申请人 |
JAPAN SCIENCE AND TECHNOLOGY AGENCY |
发明人 |
ONODERA, HIDETOSHI;A.K.M MAHFUZUL, ISLAM |
分类号 |
H03K5/134;G01R31/28;H03K3/03;H03K5/04 |
主分类号 |
H03K5/134 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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