发明名称 |
METHOD AND APPARATUS FOR SUPPRESSING METAL-GATE CROSS-DIFFUSION IN SEMICONDUCTOR TECHNOLOGY |
摘要 |
An inverter includes: a PMOS comprising: a p-type source region, a p-type drain region, a p-channel region between the p-type source region and the p-type drain region, and a PMOS metal gate region; a NMOS, comprising: an n-type source region, an n-type drain region, an n-channel region between the n-type source region and the n-type drain region, and a NMOS metal gate region; an insulating layer above the p-channel region and the n-channel region, wherein the PMOS metal gate region and the NMOS metal gate region are above the insulating layer; and a gate contact between the NMOS metal gate region and the PMOS metal gate region. |
申请公布号 |
US2015054085(A1) |
申请公布日期 |
2015.02.26 |
申请号 |
US201313973616 |
申请日期 |
2013.08.22 |
申请人 |
Xilinx, Inc. |
发明人 |
Lin Qi;Pan Hong-Tsz;Wu Yun;Nguyen Bang-Thu |
分类号 |
H01L27/092;H01L21/8238 |
主分类号 |
H01L27/092 |
代理机构 |
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代理人 |
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主权项 |
1. An inverter, comprising:
a PMOS comprising:
a p-type source region,a p-type drain region,a p-channel region between the p-type source region and the p-type drain region, anda PMOS metal gate region; a NMOS, comprising:
an n-type source region,an n-type drain region,an n-channel region between the n-type source region and the n-type drain region, anda NMOS metal gate region; an insulating layer above the p-channel region and the n-channel region, wherein the PMOS metal gate region and the NMOS metal gate region are above the insulating layer; and a gate contact between the NMOS metal gate region and the PMOS metal gate region. |
地址 |
San Jose CA US |