| 发明名称 |
ENCRYPTION PROCESSING DEVICE AND STORAGE DEVICE |
| 摘要 |
According to one embodiment, an encryption processing device includes a plurality of generating circuits to generate respective mask values for respective second data units, by using identification information to identify a first data unit and first key data, wherein the first data unit includes the second data units, each of which serves as a unit of an encryption operation, and a plurality of arithmetic circuits encrypting the respective second data units, by using the respective mask values, the second data units, and second key data, wherein the generating circuits perform parallel processing. |
| 申请公布号 |
US2015058639(A1) |
申请公布日期 |
2015.02.26 |
| 申请号 |
US201314108659 |
申请日期 |
2013.12.17 |
| 申请人 |
Kabushiki Kaisha Toshiba |
发明人 |
HASEGAWA Shinya |
| 分类号 |
G06F21/60 |
主分类号 |
G06F21/60 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An encryption processing device comprising:
a plurality of generating circuits to generate respective mask values for respective second data units, by using identification information to identify a first data unit and first key data, wherein the first data unit includes the second data units, each of which serves as a unit of an encryption operation; and a plurality of arithmetic circuits encrypting the respective second data units, by using the respective mask values, the second data units, and second key data, wherein the generating circuits perform parallel processing. |
| 地址 |
Minato-ku JP |
