PASSIVE DEVICES FOR FINFET INTEGRATED CIRCUIT TECHNOLOGIES

摘要

Device structures and design structures for passive devices that may be used as electrostatic discharge protection devices in fin-type field-effect transistor integrated circuit technologies. A device region is formed in a trench and is coupled with a handle wafer of a semiconductor-on-insulator substrate. The device region extends through a buried insulator layer of the semiconductor-on-insulator substrate toward a top surface of a device layer of the semiconductor-on-insulator substrate. The device region is comprised of lightly-doped semiconductor material. The device structure further includes a doped region formed in the device region and that defines a junction. A portion of the device region is laterally positioned between the doped region and the buried insulator layer of the semiconductor-on-insulator substrate. Another region of the device layer may be patterned to form fins for fin-type field-effect transistors.

主权项

1. A device structure fabricated using a semiconductor-on-insulator substrate having a device layer, a handle wafer, and a buried insulator layer separating the device layer from the handle wafer, the device structure comprising:
a device region coupled with the handle wafer and extending through the buried insulator layer toward a top surface of the device layer, the device region comprised of lightly-doped semiconductor material; and a first doped region in the device region that participates in defining a first junction, a first portion of the device region laterally positioned between the first doped region and the buried insulator layer.