发明名称 半導体メモリおよびビット線制御方法
摘要 <p>A semiconductor device includes: a first read/write amplifier; a second read/write amplifier; a first group of bit lines belonging to the first read/write amplifier; a second group of bit lines belonging to the second read/write amplifier and mixed with the first group of bit lines. One of the first group of bit lines and one of the second group of bit lines are selected in parallel. A reference potential is supplied to at least one of the first non-selected bit lines adjacent to the first selected bit line selected from the first group of bit lines, and to at least one of the second non-selected bit lines adjacent to the second selected bit line selected from the first group of bit lines. At least one of remaining ones of the first and second non-selected bit lines is set into a floating state.</p>
申请公布号 JP5675046(B2) 申请公布日期 2015.02.25
申请号 JP20080306130 申请日期 2008.12.01
申请人 发明人
分类号 G11C13/00;G11C16/06 主分类号 G11C13/00
代理机构 代理人
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