发明名称 |
UNEQUALIZED CLOCK DATA RECOVERY FOR SERIAL I/O RECEIVER |
摘要 |
A serial input/output method and receiver include an receiver portion to receive an analog differential serial input and sample the input to provide data and error signals, an equalization feedback loop responsive to the data and error signals to adjust the receiver portion, a phase feedback mechanism separate from the equalization feedback loop to provide a phase error, and a clock data recovery block coupled to receive the phase error to perform timing recovery for the receiver portion independent of the equalization feedback to adjust the sampling. |
申请公布号 |
EP2839582(A1) |
申请公布日期 |
2015.02.25 |
申请号 |
EP20120874749 |
申请日期 |
2012.04.19 |
申请人 |
INTEL CORPORATION |
发明人 |
HE, YUN;SARKAR, SANJIB;DENG, FEI;SINGARAVELU, SENTHIL ARUN;NAGULAPALLY, NARENDER;SHAH, PRANALI |
分类号 |
H04L7/00;G06F13/40;H03L7/00;H04L25/03 |
主分类号 |
H04L7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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