发明名称 An apparatus and method for a buffered interconnect
摘要 There is provided an interconnect for transferring requests between ports in which the ports include both source ports destination ports. The interconnect includes storage circuitry for storing the requests. Input circuitry receives the requests from the plurality of source ports, selects at least one selected source port from an allowed set of said plurality of source ports, and transfers a presented request from the at least one selected source port to the storage circuitry. Output circuitry causes a request in said storage circuitry to be output at one of said plurality of destination ports. Counter circuitry maintains counter values for a plurality of tracked ports from amongst said ports, each counter value indicating the number of requests in said storage circuitry associated with a corresponding tracked port that are waiting to be output by said output circuitry and filter circuitry determines whether or not a given source port is in said allowed set in dependence on said counter circuitry.
申请公布号 GB201500428(D0) 申请公布日期 2015.02.25
申请号 GB20150000428 申请日期 2015.01.12
申请人 ARM LIMITED 发明人
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