发明名称 Cyclic redundancy check code generating circuit, semiconductor memory device, and method of driving semiconductor memory device
摘要 Disclosed are a semiconductor memory device, and a method of driving the same, and a cyclic redundancy check code generating circuit capable of performing cyclic redundancy check. A semiconductor memory device according to an aspect of the present invention includes a memory cell array, a data processing unit receiving data that is read from the memory cell array and selectively outputting at least some of the data according to ordering information, bit structure information, and burst length information, and a check code generating unit generating a cyclic redundancy check code to detect an error in the data being output, the check code generating unit generating and outputting the cyclic redundancy check code by using the read data, the ordering information, the bit structure information, and the burst length information.
申请公布号 US8966338(B2) 申请公布日期 2015.02.24
申请号 US201213666560 申请日期 2012.11.01
申请人 Samsung Electronics Co., Ltd. 发明人 Kim Kyung-hyun
分类号 H03M13/00;H03M13/09;G06F11/10;H03M13/11;H03M13/13;H03M13/15;H03M13/19;H03M13/29 主分类号 H03M13/00
代理机构 Onello & Mello, LLP 代理人 Onello & Mello, LLP
主权项 1. A cyclic redundancy check code generating circuit comprising: selecting signal generating units configured to supply selecting signals corresponding to input/output mode information; selecting units configured to receive the selecting signals from the selecting signal generating units, to receive input data, and to select some of the input data based on the selecting signals; and adding units configured to add the selected data and to generate individual bits of a cyclic redundancy check code.
地址 KR