发明名称 Defective memory column replacement with load isolation
摘要 Exemplary embodiments of the present invention disclose a method and system for substituting a group of memory cells for a defective group of memory cells in a memory. In a step, an exemplary embodiment replaces a signal path to a group of defective memory cells with a signal path to a redundant group of memory cells. In another step, an exemplary embodiment isolates the signal path to the redundant group of memory cells from a load imposed by the signal path to the replaced group of defective memory cells.
申请公布号 US8964493(B2) 申请公布日期 2015.02.24
申请号 US201313733948 申请日期 2013.01.04
申请人 International Business Machines Corporation 发明人 Penth Silke;Polig Raphael;Werner Tobias;Woerner Alexander
分类号 G11C29/00;G11C17/18;G11C29/04 主分类号 G11C29/00
代理机构 代理人 Simek Daniel
主权项 1. A system for substituting a group of memory cells in a memory, the system comprising: one or more groups of memory cells; one or more redundant groups of memory cells; circuit to replace a signal path to a defective group of memory cells with a signal path to a redundant group of memory cells; circuit to isolate the signal path to the redundant group of memory cells from a load imposed by the signal path to the defective group of memory cells that has been replaced; wherein the system is operable to: replace the signal path to a group of defective memory cells with the signal path to a redundant group of memory cells; isolate the signal path to the redundant group of memory cells from a load imposed by the replaced signal path to the group of defective memory cells; and in response to blowing a fuse, triggering a logic transmission gate to cause a transistor to conduct and pull the replaced signal path to the group of defective memory cells to ground.
地址 Armonk NY US