Selective error correction in memory to reduce power consumption

摘要

Embodiments of apparatus, methods, systems, and devices are described herein for selective error correction in memory with multiple operation modes. In various embodiments, an error correction block (e.g., of a memory controller) may be configured to perform error correction on data read from a first portion of a memory based on a corresponding error correction code read from a second portion of the memory, and to calculate and store the error correction code. A control block coupled to the error correction block may be configured to selectively enable/disable the error correction block to perform the error correction, and to calculate and store the error correction code, based at least in part on a current operation mode of the memory.

主权项

1. An apparatus, comprising:
an error correction block configured to perform error correction on data read from a first portion of a memory based on a corresponding error correction code read from a second portion of the memory; and a control block coupled to the error correction block and configured to selectively enable the error correction block to perform error correction on data read from the memory or disable the error correction block from performance of error correction on data read from the memory, based at least in part on a current operation mode of the memory.