Reduction of forming voltage in semiconductor devices

摘要

This disclosure provides a nonvolatile memory device and related methods of manufacture and operation. The device may include one or more resistive random access memory (ReRAM) approaches to provide a memory device with more predictable operation. In particular, the forming voltage required by particular designs may be reduced through the use of a barrier layer, a reverse polarity forming voltage pulse, a forming voltage pulse where electrons are injected from a lower work function electrode, or an anneal in a reducing environment. One or more of these techniques may be applied, depending on the desired application and results.

主权项

1. A memory cell comprising:
a first conductive layer operable as an electrode; a second conductive layer operable as an electrode; a semiconductor layer between the first conductive layer and the second conductive layer;
wherein the semiconductor layer comprises a first sub-layer, a second sub-layer, and a third sub-layer such that the second sub-layer is disposed between the first sub-layer and the third sub-layer;wherein the first sub-layer and the third sub-layer comprise titanium oxide; andwherein the second sub-layer comprises hafnium oxide; and a barrier layer between the second conductive layer and the semiconductor layer;
wherein the barrier layer chemically isolates the second conductive layer from the semiconductor layer; andwherein a work function of the first conductive layer is higher than a work function of the second conductive layer.