| 摘要 |
An information processing system includes: CPUs; storage devices; switches; dummy storage devices which are with respective storage devices and each of which sends, when receiving an identifying information request, its own identifying information back to a sender of the identifying information request; and dummy CPUs which are associated with respective CPUs and each of which tries to, when receiving an instruction for acquiring identifying information from a dummy storage device, acquire the identifying information of the dummy storage device by transmitting the identifying information request, and sends the identifying information as response information back to a sender device of the acquiring instruction. |
| 主权项 |
1. An information processing system comprising:
first through N-th (N≧2) central processing units (CPUs) ; first through N-th dummy CPUs associated respectively with the first through N-th CPUs; first through M-th (M≧2) storage devices; first through M-th dummy storage devices associated respectively with the first through M-th storage devices; a main switch including at least (N+M) number of ports; first through N-th dedicated CPU switches associated respectively with the first through N-th CPUs, each of the first through N-th dedicated CPU switches having a port group including at least three ports; and first through M-th dedicated storage device switches associated respectively with the first through M-th storage devices, each of the first through M-th dedicated storage device switches having a port group including at least three ports, wherein the port group of each dedicated CPU switch among the first through N-th dedicated CPU switches is connected to a CPU among the first through N-th CPUs which is associated with the each dedicated storage switch, to a dummy CPU among the first through N-th dummy CPUs which is associated with the CPU, and to one port of the main switch, the port group of each dedicated storage device switch among the first through M-th dedicated storage device switches is connected to a storage device among the first through M-th storage devices which is associated with the each dedicated storage device switch, to a dummy storage device among the first through M-th dummy storage devices associated with the storage device, and to one port of the main switch, each of the first through M-th dummy devices is a device that sends, when receiving an identifying information request, its own identifying information back to a sender of the identifying information request, and each of the first through N-th dummy CPUs is a device that tries to, when receiving an instruction of acquiring identifying information from a dummy storage device among the first through M-th storage devices, acquire the identifying information of the dummy storage device by transmitting the identifying information request, and sends the identifying information as response information back to a sender device of the acquiring instruction. |
