发明名称 Semiconductor device and method for manufacturing same
摘要 An N type well (NW) is formed over a prescribed depth from a main surface of a semiconductor substrate (SUB), and a P type well (PW) and an N type drain region (ND) are formed in the N type well (NW). An N type source region (NS), an N+ type source region (NNS), and a P+ type impurity region (BCR) are formed in the P type well (PW). The N type source region (NS) is formed on a region situated directly below the N+ type source region (NNS), and not on a region situated directly below the P+ type impurity region (BCR), and the P+ type impurity region (BCR) is in direct contact with the P type well (PW).
申请公布号 US8963199(B2) 申请公布日期 2015.02.24
申请号 US201213985552 申请日期 2012.02.21
申请人 Renesas Electronics Corporation 发明人 Kubo Shunji
分类号 H01L29/66;H01L21/20;H01L21/332;H01L29/06;H01L29/08;H01L29/78;H01L29/10;H01L29/423 主分类号 H01L29/66
代理机构 McDermott Will & Emery LLP 代理人 McDermott Will & Emery LLP
主权项 1. A semiconductor device comprising: a semiconductor substrate of a first conductivity type having a main surface; a first impurity region of the first conductivity type formed over a prescribed depth from said main surface of said semiconductor substrate, and having a first impurity concentration; a second impurity region of a second conductivity type formed over a prescribed depth from a surface of said first impurity region to be surrounded by said first impurity region on side and lower portions, and having a second impurity concentration; a third impurity region of the second conductivity type formed over a prescribed depth from a surface of said second impurity region to be surrounded by said second impurity region on side and lower portions, and having a third impurity concentration higher than said second impurity concentration; a fourth impurity region of the first conductivity type formed over a prescribed depth from the surface of said first impurity region to be surrounded by said first impurity region on side and lower portions and in direct contact with said first impurity region, and having a fourth impurity concentration higher than said first impurity concentration; a fifth impurity region of the second conductivity type formed over a prescribed depth from said main surface of said semiconductor substrate at a distance from said first impurity region; and an electrode portion formed on a region lying between said second impurity region and said fifth impurity region, wherein a plurality of said fourth impurity regions are formed, and said plurality of said fourth impurity regions are arranged at a distance from one other in a direction intersecting with a direction of current that is allowed to flow between said second impurity region and said fifth impurity region by application of a prescribed voltage to said electrode portion.
地址 Kanagawa JP