Median line based critical timing path optimization

摘要

A computer implemented method for designing an integrated circuit includes: forming, on a computing device, a description of an initial layout of the integrated circuit, the layout including at least two paths, each of the two paths including an input, an output and an at least one combinational element; identifying critical paths in the initial layout; forming a median line between the input and the output for at least one of the critical paths; and moving a location of a combinational element in the at least one critical path from a first location to a second location to form a revised layout, the first location being further from the median line than the second location.

主权项

1. A computer implemented method for designing an integrated circuit, the method comprising:
forming, on a computing device, a description of an initial layout of the integrated circuit, the layout including at least two paths, each of the two paths including an input, an output and at least one combinational element; identifying critical paths in the initial layout; forming a median line between start and end locations for at least one of the critical paths; and moving a location of a combinational element in the at least one critical path from a first location to a second location to form a revised layout, the second location being closer to the median line than the first location.