发明名称 Display apparatus
摘要 A display apparatus includes a timing controller, a data driver, and display panel. The timing controller outputs a plurality of image signals, a first control signal, and a second control signal. The data driver converts the image signals to first voltages in response to the first control signal, outputs the first voltages, and outputs a second voltage swinging between two different voltage levels in at least one frame unit in response to the second control signal. The display panel includes a plurality of pixels, where each receives a corresponding one of the first voltages and the second voltage to display an image.
申请公布号 US8963822(B2) 申请公布日期 2015.02.24
申请号 US201012761711 申请日期 2010.04.16
申请人 Samsung Display Co., Ltd. 发明人 Yoon Hyun-Sik;Park Heebum;Baek Seungsoo
分类号 G09G3/36 主分类号 G09G3/36
代理机构 F. Chau & Associates, LLC 代理人 F. Chau & Associates, LLC
主权项 1. A display apparatus comprising: a timing controller that outputs a plurality of image signals, a first control signal, a second control signal, and a third control signal; a data driver that receives the image signals, the first control signal, the second control signal, and the third control signal and converts the image signals to data voltages in response to the first control signal, outputs the data voltages, a first common voltage swinging between two different voltage levels in at least one frame unit in response to the second control signal, and a second common voltage having a phase opposite to the first common voltage in response to the third control signal; and a display panel that includes a plurality of pixels, wherein at least one of the pixels receives a corresponding one of the first common voltage and the second common voltage to display an image and a corresponding data voltage of the data voltages from the data driver, wherein the data driver comprises: a converter part that converts the image signals having n bits to the data voltages, alternately selects one of a predetermined first reference signal having n bits or a predetermined second reference signal having n bits, and converts the selected one of the first and second reference signals to the first common voltage and a remaining one of the first and second reference signals to the second common voltage; andan output buffer that outputs the data voltages output from the converter part, where n is a positive integer equal to or greater than 1.
地址 Yongin, Gyeonggi-Do KR