发明名称 CACHE MEMORY CONTROL PROGRAM, PROCESSOR INCLUDING CACHE MEMORY, AND CACHE MEMORY CONTROL METHOD
摘要 <p>PROBLEM TO BE SOLVED: To improve utilization efficiency of a cache memory.SOLUTION: Provided is a processor-readable cache memory control program for causing a processor to execute a cache memory control step of controlling a cache memory provided commonly to a plurality of processors, the cache memory control process including: a dividing step of dividing the cache memory into sector areas by the number that is the number of processors plus at least 1; an allocating step of allocating the sector areas to processes executed by the respective processors as dedicated cache areas; and a process switching step of, when the process executed by a first processor is switched from a first process to a second process, allocating a free sector area that is not allocated to any processes out of the sector areas to the second process, and releasing a first sector area allocated to the first process.</p>
申请公布号 JP2015036959(A) 申请公布日期 2015.02.23
申请号 JP20130169195 申请日期 2013.08.16
申请人 FUJITSU LTD 发明人 FUJII MASATOSHI;HINOHARA HISASHI;YUBA YASUHIRO
分类号 G06F12/08 主分类号 G06F12/08
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