发明名称 |
ADHESION LAYER FOR THROUGH SILICON VIA METALLIZATION |
摘要 |
To achieve the foregoing and in accordance with the purpose of the present invention, a method for forming copper filled through silicon via features in a silicon wafer is provided. Through silicon vias are etched in the wafer. An insulation layer is formed within the through silicon vias. A barrier layer is formed within the through silicon vias. An oxide free silicon, germanium, or SiGe adhesion layer is deposited over the barrier layer. A seed layer is deposited over the adhesion layer then the wafers is annealed. The features are filled with copper or copper alloy. The stack is annealed. |
申请公布号 |
US2015050808(A1) |
申请公布日期 |
2015.02.19 |
申请号 |
US201313966168 |
申请日期 |
2013.08.13 |
申请人 |
Lam Research Corporation |
发明人 |
KOLICS Artur |
分类号 |
H01L21/768 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
1. A method for forming copper filled through silicon via features in a silicon wafer, comprising:
etching through silicon vias in the wafer; forming an insulation layer within the through silicon vias; forming a barrier layer within the through silicon vias; depositing an oxide free silicon, germanium, or SiGe adhesion layer over the barrier layer; depositing a seed layer over the adhesion layer; annealing the stack; filling the features with copper or copper alloy; and annealing the stack. |
地址 |
Fremont CA US |