发明名称 |
FABRICATION METHOD OF PACKAGING SUBSTRATE |
摘要 |
A packaging substrate and a semiconductor package using the packaging substrate are provided. The packaging substrate includes: a substrate body having a die attach area, a circuit layer formed around the die attach area and having a plurality of conductive traces each having a wire bonding pad, and a surface treatment layer formed on the wire bonding pads. Therein, only one of the conductive traces is connected to an electroplating line so as to prevent cross-talk that otherwise occurs between conductive traces due to too many electroplating lines in the prior art. |
申请公布号 |
US2015050782(A1) |
申请公布日期 |
2015.02.19 |
申请号 |
US201414531226 |
申请日期 |
2014.11.03 |
申请人 |
Siliconware Precision Industries Co., Ltd. |
发明人 |
Chen Chia-Yin;Liu Yu-Ching;Chang Yueh-Chiung;Wang Yu-Po |
分类号 |
H01L23/00 |
主分类号 |
H01L23/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
Taichung TW |