| 摘要 |
Reduction in efficiency of a power supply circuit in a display device is prevented. A positive power supply generation circuit and a negative power supply generation circuit are placed close to a terminal portion to which a drive clock and a power supply electric potential are applied externally. The terminal portion 140 is formed in an edge portion of the TFT glass substrate 100. That is, the positive power supply generation circuit 131 and the negative power supply generation circuit 132 are placed closer to the terminal portion 140 than primary circuits of the liquid crystal display device, which are the pixel portion 105, the horizontal drive circuit 110 and the vertical drive circuit 120. With this, there is obtained a layout that minimizes wiring loads (resistive and capacitive loads associated with wirings to provide the power supply and the drive clock) to prevent reduction in circuit efficiency. |
