YIELD OPTIMIZATION OF PROCESSOR WITH GRAPHENE-BASED TRANSISTORS

摘要

Techniques described herein generally include methods and systems related to the selection of a combination of graphene an non-graphene transistors in an IC design. To reduce the increase in leakage energy caused by graphene transistors, selected non-graphene transistors may be replaced with graphene transistors in the IC design while other non-graphene transistors may be retained in the IC design. To limit the number of graphene transistors in the IC design, graphene transistors may replace non-graphene transistors primarily at locations in the IC design where significant delay benefit can be realized.