发明名称 RELIEF CONTROL METHOD IN LAMINATED MEMORY AND METHOD FOR MANUFACTURING LAMINATED MEMORY DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To provide a laminated memory capable of avoiding increase of chip size by laminating dedicated fuse chips and memory core chips to carry out interconnection with small number of inter-chip bonding signals.SOLUTION: A laminated memory comprises a configuration by laminating: memory core chips MC comprising memory cell arrays 20 including backup memory cells for replacing failure memory cells; and fuse chips HC comprising a fuse part capable of establishing an electric cutting state corresponding to replacement to the backup memory cells and a relief control circuit for controlling relief operation of the failure memory cells on the basis of state information of the fuse part. The lamination memory configured in this way can reduce size by making loading of a fuse element and the relief control circuit on the memory core chips MC unnecessary and can reduce the number of inter-chip bonding signals between the memory core chips MC and the fuse chips HC.</p>
申请公布号 JP2015035605(A) 申请公布日期 2015.02.19
申请号 JP20140171542 申请日期 2014.08.26
申请人 PS4 LUXCO S A R L 发明人 SHIBATA KAYOKO
分类号 H01L25/065;G11C5/00;G11C11/401;G11C29/00;H01L21/3205;H01L21/768;H01L23/522;H01L25/07;H01L25/18;H01L27/10 主分类号 H01L25/065
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