发明名称 |
Meander Line Resistor Structure |
摘要 |
A system comprises a first transistor comprising a first active region and a second active region, a first resistor comprising a plurality of first vias connected in series, wherein the first resistor is over the first active region, a second resistor comprising a plurality of second vias connected in series, wherein the second resistor is over the second active region, a second transistor comprising a third active region and a fourth active region, a capacitor having a terminal electrically coupled to the fourth active region and a bit line electrically coupled to the third active region. |
申请公布号 |
US2015048432(A1) |
申请公布日期 |
2015.02.19 |
申请号 |
US201414528734 |
申请日期 |
2014.10.30 |
申请人 |
Taiwan Semiconductor Manufacturing Company, Ltd. |
发明人 |
Yen Hsiao-Tsung;Lin Yu-Ling |
分类号 |
H01L27/108;H01L23/528;H01L23/522;H01L27/06;H01L29/06 |
主分类号 |
H01L27/108 |
代理机构 |
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代理人 |
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主权项 |
1. A system comprising:
a first interlayer dielectric layer over a substrate; a second interlayer dielectric layer over the first interlayer dielectric layer; a third interlayer dielectric layer over the second interlayer dielectric layer; a first metallization layer over the third interlayer dielectric layer; a first resistor over a first active region of the substrate; a second resistor over a second active region of the substrate; and an interconnector in the first metallization layer and coupled between the first resistor and the second resistor; and a second transistor comprising a third active region and a fourth active region; and a capacitor comprising a first capacitor plate in the second interlayer dielectric layer and a second capacitor plate. |
地址 |
Hsin-Chu TW |