发明名称 |
METHOD OF FORMING SEMICONDUCTOR DEVICE HAVING MULTILAYERED PLUG AND RELATED DEVICE |
摘要 |
A semiconductor pattern is formed on a substrate. An interlayer insulating layer is formed on the semiconductor pattern. A contact hole in the interlayer insulating layer is formed the semiconductor pattern is exposed. A lower plug is formed in the contact hole by a selective epitaxial growth (SEG) process. An upper plug is formed in the contact hole on the lower plug by alternately and repeatedly performing a deposition process and an etching process. |
申请公布号 |
US2015050805(A1) |
申请公布日期 |
2015.02.19 |
申请号 |
US201414200798 |
申请日期 |
2014.03.07 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
OH HYOUNG-WON;Lim Tae-Jin;Hong Tae-Ki |
分类号 |
H01L21/768 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
1. A method of forming a semiconductor device, comprising:
forming a semiconductor pattern on a substrate; forming an interlayer insulating layer on the semiconductor pattern; forming a contact hole in the interlayer insulating layer exposing the semiconductor pattern; forming a lower plug in the contact hole by a selective epitaxial growth (SEG) process; and forming an upper plug in the contact hole on the lower plug by alternately and repeatedly performing a deposition process and an etching process. |
地址 |
Gyeonggi-do KR |