发明名称 半導体パッケージの製造方法
摘要 <p><P>PROBLEM TO BE SOLVED: To solve the problem that unevenness of infiltration is generated under a semiconductor element, which causes generation of involvement voids, when a liquid thermosetting resin is injected after mounting the semiconductor element and a gap between the semiconductor element and a multilayer wiring substrate is sealed, in a method of manufacturing a semiconductor package in which the semiconductor element is connected by the face-down method via a projection electrode on a surface insulation layer of the multilayer wiring substrate consisting of a conductor layer and an insulation layer alternately laminated for at least one or more layers, and the liquid thermosetting resin is applied to the gap between the semiconductor element and the multilayer wiring substrate to seal the projection electrode. <P>SOLUTION: In a method of manufacturing a semiconductor package, a surface active process is performed ununiformly using plasma discharge at least to a region on a surface insulation layer where a semiconductor element is mounted. <P>COPYRIGHT: (C)2012,JPO&INPIT</p>
申请公布号 JP5671912(B2) 申请公布日期 2015.02.18
申请号 JP20100216735 申请日期 2010.09.28
申请人 发明人
分类号 H01L21/60;H01L21/56 主分类号 H01L21/60
代理机构 代理人
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