Semiconductor memory, memory controller, system, and operating method of semiconductor memory

摘要

When a main block address held in a main refresh address counter (MRAC) coincides with an access block address corresponding to an access request, its counter value is transferred to a sub refresh address counter (SRAC). Thereafter, the sub refresh address counter (SRAC) operates with priority over the main refresh address counter (MRAC) until its counter value reaches a final value. Consequently, an access operation and a refresh operation can be simultaneously executed without interfering with each other. As a result, it is possible to execute the refresh operation with a minimum increase in circuit scale and without any deterioration in access efficiency.