| 摘要 |
1345921 Echo suppressors WESTERN ELECTRIC CO Inc 31 Aug 1971 [2 Sept 1970 4 Sept 1970] 40630/71 Heading H4R Relates to an echo suppressor system of the same type as described in Specification 1,216,352 where the signal levels on the incoming and outgoing lines are detected and compared with their previous levels to determine activity states and echo suppression is enabled if the incoming line is determined to be active and the outgoing line idle. The present invention utilizes speech detectors 2 and 1, connected respectively to the incoming LO and outgoing LE lines each of which samples the line signal level and converts the digital p.c.m. code samples into amplitude codes representing approximated peak signal levels, the amplitude codes being continuously updated on a rising signal level but only being reduced to a lower amplitude code after a decrease has existed for a predetermined number of line samples, the operation of the detectors being described with respect to the state diagram of Fig. 9 (not shown), and block diagram of Fig. 8 (not shown). The output of the incoming signal threshold detector 2 is applied to a second threshold detector 4 in which the amplitude codes are compared with a threshold level, S 0 , corresponding to the minimum level likely to produce echoes, and to a stretched version OLi, of the amplitude code signal, stored in the threshold detector 4, to generate, in accordance with the comparison and in dependence of the time of existence of the comparison results, an odd line status, following the sequence described with respect to the state diagram, Fig. 4B (not shown). The line status is fed to the suppression control logic 12 and also controls the up-dating of the stretched signal level signal OLi which is fed to a comparator 5 for comparison with the signal Si from the threshold detector connected to the outgoing, or even, line LE, to generate a status signal for the even line according to the state diagram, Fig. 4C (not shown). if the odd line is determined as active and the even line determined idle then the suppression logic 12 switches in the echo suppression attenuator 18 into the outgoing line. If the activity states of the two lines are determined both to be active then the suppression logic switches attenuator 18 out of circuit but switches double talk attenuator 8 into circuit to reduce the loop gain of the circuit and reduce the level of echoes. The complete suppression circuitry operates in time division multiplex to a number of channels. |
