发明名称 PLLシンセサイザ
摘要 <p><P>PROBLEM TO BE SOLVED: To reduce a capacitance value of a capacitor for a temperature-compensation loop filter. <P>SOLUTION: A PLL synthesizer comprises: a phase comparator PD; a loop filter LF; and a voltage-controlled oscillator VCO. In addition, as a temperature-compensation loop, the PLL synthesizer comprises: a comparator CMP that outputs a comparison signal 30 when a frequency control voltage goes out of a control voltage range; a digital filter DF that integrates the comparison signal 30 to generate an M-bit first digital signal 32;ΣΔmodulators 12 and 10 that input the first digital signal 32 and generate a second digital signal 34 corresponding to the first digital signal 32 as an N-bit signal (where N is smaller than M); a temperature-compensation charge pump CPt that converts the second digital signal 34 to a current signal 36; and a temperature-compensation loop filter TF that converts the current signal 36 to a temperature-compensation control voltage. The voltage-controlled oscillator VCO controls a frequency of an output clock CKout based on the temperature-compensation control voltage ft. <P>COPYRIGHT: (C)2012,JPO&INPIT</p>
申请公布号 JP5670123(B2) 申请公布日期 2015.02.18
申请号 JP20100185363 申请日期 2010.08.20
申请人 发明人
分类号 H03L7/093;H03L7/10 主分类号 H03L7/093
代理机构 代理人
主权项
地址